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Fix bad indexing of clk rigisters

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This commit is contained in:
Drahoslav 2017-11-16 01:12:13 +01:00
parent 8208ca5f0d
commit fd0764b709
1 changed files with 6 additions and 6 deletions
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12
rpio.go
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@ -315,18 +315,18 @@ func SetFreq(pin Pin, freq int) {
divi &= maxUint12 divi &= maxUint12
divf &= maxUint12 divf &= maxUint12
clkCtlReg := 0x70 clkCtlReg := 28
clkDivReg := 0x74 clkDivReg := 29
switch pin { switch pin {
case 4, 20, 32, 34: // clk0 case 4, 20, 32, 34: // clk0
clkCtlReg += 0 clkCtlReg += 0
clkDivReg += 0 clkDivReg += 0
case 5, 21, 42, 44: // clk1 case 5, 21, 42, 44: // clk1
clkCtlReg += 8 clkCtlReg += 2
clkDivReg += 8 clkDivReg += 2
case 6, 43: // clk2 case 6, 43: // clk2
clkCtlReg += 16 clkCtlReg += 4
clkDivReg += 16 clkDivReg += 4
default: default:
return return
} }